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PD- 94820
SMPS MOSFET
Applications Switch Mode Power Supply ( SMPS ) Uninterruptable Power Supply High speed power switching Lead-Free Benefits Low Gate Charge Qg results in Simple Drive Requirement Improved Gate, Avalanche and dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche Voltage and Current Effective Coss specified ( See AN 1001)
IRF830APBF
HEXFET(R) Power MOSFET
VDSS
500V
Rds(on) max
1.40
ID
5.0A
TO-220AB
GDS
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
5.0 3.2 20 74 0.59 30 5.3 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topologies: Two transistor Forward Half Bridge and Full Bridge
Notes
through
are on page 8
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1
11/5/03
IRF830APBF
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 --- --- 2.0 --- --- --- --- Typ. --- 0.60 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 1.4 VGS = 10V, ID = 3.0A 4.5 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Max. Units Conditions --- S VDS = 50V, ID = 3.0A 24 ID = 5.0A 6.3 nC VDS = 400V 11 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 5.0A ns --- RG = 14 --- RD = 49,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 2.8 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 21 21 15 620 93 4.3 886 27 39
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
230 5.0 7.4
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Typ.
--- 0.50 ---
Max.
1.7 --- 62
Units
C/W
Diode Characteristics
Min. Typ. Max. Units IS
ISM
VSD trr Qrr ton
2
Conditions D MOSFET symbol --- --- 5.0 showing the A G integral reverse --- --- 20 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 5.0A, VGS = 0V --- 430 650 ns TJ = 25C, IF = 5.0A --- 1.62 2.4 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF830APBF
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
I D , Drain-to-Source Current (A)
10
I D , Drain-to-Source Current (A)
10
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1
1
0.1
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
4.5V
0.01 0.1
0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 5.0A
I D , Drain-to-Source Current (A)
2.0
10
TJ = 150 C TJ = 25 C
1
1.5
1.0
0.5
0.1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF830APBF
10000
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + C gd
20
ID = 5.0A
16
C, Capacitance (pF)
1000
VDS = 400V VDS = 250V VDS = 100V
Ciss
12
100
Coss
8
10
4
Crss
1 1 10 100 1000
A
0
FOR TEST CIRCUIT SEE FIGURE 13
0 4 8 12 16 20 24
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
ID , Drain Current (A)
10us 10 100us
10
TJ = 150 C
1ms 1 10ms
1
TJ = 25 C
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF830APBF
5.0
VDS VGS
RD
4.0
ID , Drain Current (A)
RG
D.U.T.
+
-VDD
3.0
10V
Pulse Width 1 s Duty Factor 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
1.0
VDS 90%
0.0
25
50
75
100
125
150
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE)
0.01 0.00001
0.0001
0.001
0.0
t1 , Rectangular Pulse Durat
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF830APBF
EAS , Single Pulse Avalanche Energy (mJ)
15V
500
VDS
L
DRIVER
400
ID 2.2A 3.2A BOTTOM 5.0A TOP
RG
20V
D.U.T
IAS tp
+ V - DD
300
A
0.01
200
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
100
0
25
Starting T , Junction Temperature( C) J
50
75
100
125
150
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
V DSav , Avalanche Voltage (V)
790
VG
785
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
780
50K 12V .2F .3F
775
D.U.T. VGS
3mA
+ V - DS
770 0.0
1.0
2.0
3.0
4.0
5.0
A
I av , Avalanche Current (A)
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRF830APBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
+ +
-
RG
* * * *
dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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IRF830APBF
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- EMITTER 3- SOURCE 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER
Note: "P" in assembly line position indicates "Lead-Free"
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 18mH RG = 25, IAS = 5.0A. (See Figure 12) ISD 5.0A, di/dt 370A/s, VDD V(BR)DSS, TJ 150C
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.11/03
8
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